Omron CJ1M-CPU11 PLC
0৳
Model: CJ1M CPU11
Type: Omron PLC CPU Unit
Specification:
Omron Electronics CJ1 Series Micro Programmable Logic Controller CPU Module, 5K steps program capacity, 160 I/O points & 10 units max: no expansion rack, 32K words, standards: UC1, CE, N, L, stored program, version 4.0
CJ1M CPU11 Omron Sysmac PLC
CJ1M CPU11 Features:
- Compact 90 * 65 mm (H * D) dimensions are first class in the industry.
- Provides excellent high-speed control performance, with high-speed processing of 0.1 μs for LD instructions and 13.3 μs for floating-point calculations.
- High-capacity Memory Cards up to 128 MB can install, and used to backup the program and system settings, or log customer data.
- The large instruction set can support diverse applications. Four types of programming supported (ladder, structured text, sequential function charts, and instruction lists), with approximately 400 instructions and 800 instruction variations.
- These CJ-series CPU Units support structured programming using function blocks, which can improve the customer’s program development resources.
- The various protection functions provide improved security to protect valuable software resources and property.
- The CPU Units compatible with the CX-One Integrated Tool Package. Information for each component can link, and the system’s data can be integrated into one database. The software can provide total support from PLC settings to network startup.
| Item | Specifications | |||
|---|---|---|---|---|
| Control method | Stored program | |||
| I/O control method | Cyclic scan and immediate processing are both possible. | |||
| Programming | LD (Ladder), SFC (Sequential Function Chart), ST (Structured Text), Mnemonic | |||
| CPU processing mode | CJ1M CPU Units: Normal Mode or Peripheral Servicing Priority Mode | |||
| Instruction length | 1 to 7 steps per instruction | |||
| Ladder instructions | Approx. 400 (3-digit function codes) | |||
| Execution time | CJ1M CPU Units (CPU12/13/22/23): Basic instructions: 0.10 μs min. Special instructions: 0.15 μs min. CJ1M CPU Units (CPU11/21): Basic instructions: 0.10 μs min. Special instructions: 0.15 μs min. |
|||
| Overhead time | CJ1M CPU Units (CPU12/13/22/23): 0.5 ms min. CJ1M CPU Units (CPU11/21): 0.7 ms min. |
|||
| Unit connection method | No Backplane: Units connected directly to each other. | |||
| Mounting method | DIN Track (screw mounting not possible) | |||
| Maximum number of connectable Units |
CJ1M CPU Units: Total of 20 Units in the System, including 10 Units on CPU Rack and 10 Units on one Expansion Rack. |
|||
| Maximum number of Expansion Racks |
CJ1M CPU Units (CPU 13/23 only): 1 max. (An I/O Control Unit required on the CPU Rack and an I/O Interface Unit is required on the Expansion Rack.) CJ1M CPU Units (CPU11/12/21/22): Expansion is not possible. |
|||
| Number of tasks | 288 (cyclic tasks: 32, interrupt tasks: 256) With CJ1M CPU Units, interrupt tasks can define as cyclic tasks called “extra cyclic tasks.” Including these, up to 288 cyclic tasks can be used. Note 1. Cyclic tasks executed each cycle and controlled with TKON(820) and TKOF(821) instructions. Note 2. The following 4 types of interrupt tasks supported. Power OFF interrupt tasks: 1 max. Scheduled interrupt tasks: 2 max. I/O interrupt tasks: 32 max. External interrupt tasks: 256 max. |
|||
| Interrupt types | Scheduled Interrupts: Interrupts generated at a time scheduled by the CPU Unit’s built-in timer. (See note. 1) I/O Interrupts: Interrupts from Interrupt Input Units. Power OFF Interrupts (See note 2.): Interrupts executed when the CPU Unit’s power is turned OFF. External I/O Interrupts: Interrupts from the Special I/O Units or CPU Bus Units. Note 1. CJ1M CPU Units: Scheduled interrupt time interval is 0.5 ms to 999.9 ms (in increments of 0.1 ms), 1 ms to 9,999 ms (in increments of 1 ms), or 10 ms to 99,990 ms (in increments of 10 ms) Note 2. Not supported when the CJ1W-PD022 Power Supply Unit is mounted. |
|||
| Function blocks (CPU Unit with unit version 3.0 or later only) |
Languages in function block definitions: ladder programming, structured text | |||
| CIO (Core I/O) Area |
I/O Area | 1,280: CIO 000000 to CIO 007915 (80 words from CIO 0000 to CIO 0079) The setting of the first word can be changed from the default (CIO 0000) so that CIO 0000 to CIO 0999 can be used. I/O bits are allocated to Basic I/O Units. |
The CIO Area can be used as work bits if the bits are not used as shown here. |
|
| Link Area | 3,200 (200 words): CIO 10000 to CIO 119915 (words CIO 1000 to CIO 1199) Link bits are used for data links and are allocated to Units in Controller Link Systems. |
|||
| CPU Bus Unit Area |
6,400 (400 words): CIO 150000 to CIO 189915 (words CIO 1500 to CIO 1899) CPU Bus Unit bits store the operating status of CPU Bus Units. (25 words per Unit, 16 Units max.) |
|||
| Special I/O Unit Area |
15,360 (960 words): CIO 200000 to CIO 295915 (words CIO 2000 to CIO 2959) Special I/O Unit bits are allocated to Special I/O Units. (10 words per Unit, 96 Units max.) Note: Special I/O Units are I/O Units that belong to a special group called “Special I/O Units.” Example: CJ1W-AD081 Analog Input Unit |
|||
| Serial PLC Link Area (CJ1M CPU Units only) |
1,440 (90 words): CIO 310000 to CIO 318915 (words CIO 3100 to CIO 3189) | |||
| DeviceNet Area | 9,600 (600 words): CIO 320000 to CIO 379915 (words CIO 3200 to CIO 3799) DeviceNet bits are allocated to Slaves for DeviceNet Unit remote I/O communications when the Master function is used with fixed allocations. |
|||
| Fixed allocation setting 1 | Outputs: CIO 3200 to CIO 3263 Inputs: CIO 3300 to CIO 3363 |
|||
| Fixed allocation setting 2 | Outputs: CIO 3400 to CIO 3463 Inputs: CIO 3500 to CIO 3563 |
|||
| Fixed allocation setting 3 | Outputs: CIO 3600 to CIO 3663 Inputs: CIO 3700 to CIO 3763 |
|||
| The following words are allocated to the Master function even when the DeviceNet Unit is used as a Slave. |
||||
| Fixed allocation setting 1 | Outputs: CIO 3370 (Slave to Master) Inputs: CIO 3270 (Master to Slave) |
|||
| Fixed allocation setting 2 | Outputs: CIO 3570 (Slave to Master) Inputs: CIO 3470 (Master to Slave) |
|||
| Fixed allocation setting 3 | Outputs: CIO 3770 (Slave to Master) Inputs: CIO 3670 (Master to Slave) |
|||
| Internal I/O Area |
4,800 (300 words): CIO 120000 to CIO 149915 (words CIO 1200 to CIO 1499) 37,504 (2,344 words): CIO 380000 to CIO 614315 (words CIO 3800 to CIO 6143) These bits in the CIO Area are used as work bits in programming to control program execution. They cannot be used for external I/O. |
|||
| Work Area | 8,192 bits (512 words): W00000 to W51115 (W000 to W511) Controls the programs only. (I/O from external I/O terminals is not possible.) Note: When using work bits in programming, use the bits in the Work Area first before using bits from other areas. |
|||
| Holding Area | 8,192 bits (512 words): H00000 to H51115 (H000 to H511) Holding bits are used to control the execution of the program, and maintain their ON/OFF status when the PLC is turned OFF or theoperating mode is changed. Note: The Function Block Holding Area words are allocated from H512 to H1535. These words can be used only for the function block instance area (internally allocated variable area). |
|||
| Auxiliary Area | Read only: 7,168 bits (448 words): A00000 to A44715 (words A000 to A447) Read/write: 8,192 bits (512 words): A44800 to A95915 (words A448 to A959) Auxiliary bits are allocated specific functions. |
|||
| Temporary Area | 16 bits (TR0 to TR15) Temporary bits are used to temporarily store the ON/OFF execution conditions at program branches. |
|||
| Timer Area | 4,096: T0000 to T4095 (used for timers only) | |||
| Counter Area | 4,096: C0000 to C4095 (used for counters only) | |||
| DM Area | 32 Kwords: D00000 to D32767 Used as a general-purpose data area for reading and writing data in word units (16 bits). Words in the DM Area maintain their status when the PLC is turned OFF or the operating mode is changed. Internal Special I/O Unit DM Area: D20000 to D29599 (100 words × 96 Units) Used to set parameters for Special I/O Units. CPU Bus Unit DM Area: D30000 to D31599 (100 words × 16 Units) Used to set parameters for CPU Bus Units. |
|||
| Index Registers | IR0 to IR15 Store PLC memory addresses for indirect addressing. Index registers can be used independently in each task. One register is 32 bits (2words). CJ1M CPU Units: Setting to use index registers either independently in each task or to share them between tasks. |
|||
| Task Flag Area | 32 (TK0000 to TK0031) Task Flags are read-only flags that are ON when the corresponding cyclic task is executable and OFF when the corresponding task is not executable or in standby status. |
|||
| Trace Memory | 4,000 words (trace data: 31 bits, 6 words) | |||
| File Memory | Memory Cards: Compact flash memory cards can be used (MS-DOS format). | |||
Related products
Industrial Automation
1,550৳
0৳
Industrial Automation
30,700৳
Industrial Automation
12,000৳
Industrial Automation
0৳
Industrial Automation
0৳
Industrial Automation
32,000৳
Industrial Automation
0৳